This is a transistorized version of a typical guitar amp front end. In a tube amp the signal is subected to square law distortion i.e. the current response is the square of the grid voltage. This is what gives the amp that warm sounding response from even harmonic generation. Fortunately a JFET transistor operates on the same principle and it can be used in place of the tube in the preamp section at least. It can be a problem selecting the proper device that operates at a reasonable current level for the particular application but there are devices that are close enough along with the use of properly selected adjacent components that will provide good results.

The first stage is the preamp and is not used to create any clipping distortion but is operated in the very linear part of the gate curve. In the tube version the tube is self biased at -1.2V with a cathode resistor and the anode voltage idles at the middle of B+ and the crunch zone of the tube providing maximum voltage swing in the most linear part of the curves. Most electric guitars on agerage at maximum output level produce an ~1.2Vp-p signal, or ±600mV, when the strings are strummed. On the positive swing, being +600mV, it is only ½ of the 1.2V bias and assuming that the tube is idling at ½ its maximum anode current this positive swing should produce an ~¾ maximum current response. In the transistor version a very similar model is needed. Running an 18V supply, self biasing the gate at -1.2V, allowing a 4V headroom on the negative output swing approaching maximum Idss should produce an ~14Vp-p output before any hard clipping. With the tone stack using an ~4KΩ drive impedance equivalent to the tube circuit, the ideal device would need an Idss of 3.6mA and a VgsOff of -4.1V. Using a 3.9K drain resistor and a 666Ω source resistor with the source AC bypassed with a large capacitor like the tube version would be a good transistor version. Trying to find JFETs with these parameters economically on a consistent basis is difficult especially for large scale manfacturing which is why this type of circuitry is seldom seen in production. However for DIY projects and small scale custom jobs hand selecting source and drain resistors for each device is within reach.

Since this input stage is running in a linear mode and to ease the JFET selection process using a device with a higher drain current than necessary and high transconductance makes device implementatoin easier. The device used here is a J309 using its minimum spec of Idss of 12mA and VgsOff of -1V. Since the device has much higher gain than necessary and the bias needed of -1.2V is greater than the auto bias of JFET running at half the Idss current the JFET will be run at much less than ½ of Idss with its source swamped with the auto bias source resistor by omitting the source bypass capacitor thus allowing the ∆V of the source resistor to add to the headroom of the positive swing of the signal to at least meet the 1.2V goal. This requires a source resistor of ~200Ω idling at 2.65mA and a 2.7K drain resistor to idle the drain at ~11V for maximum p-p output. Depending on each JFET's own parameters the source and drain resistors must be chosed to meet these general requirements. The output voltage swing can be increased by ~43% by running the supply voltage at 24V and increasing the drain resistor to 3.9K which is more inline with the drive impedance used by the tone circuit in its tube configuration. The J309 has an upper limit of 25V for supply so this is just below that.

After passing through the tone circuit the next stage of amplification is the overdrive section but in order to get good overdrive the JFET needs to have a low cutoff voltage so the JFET can be heavily driven if desired. Increasing the supply voltage as stated previously and increasing the drain resistor of the first amp helps with this. While a J309 could be used and its cutoff voltage is low enough is current is much higher than necessary and a state of Vgs=0 on the inpuut is desired for good clipping. A more appropiate device is is the J202 which has much lower Idss. A low Idss MPF102 could be used also. In fact the minimum spec. for an MPF102 of Idss=2mA and VgsOff=500mV is ideal for use when the spply voltage is +15V or less. A DIY implementation of a two stage JFET distortion pedal can be found here for more insight. A two stage version will offer better distortion symetry reducing even harmonics and increasing odd harmonics.

For starters this amp will will be run at ½ of Idss and the source resistor is selected to meet this while the drain resistor will be selected so the idle output voltage is in the middle of the p-p swing capability of the amp, ~11V. These values can be tweaked for individual taste. Since the DC bias of the input to the reverb unit is dependent upon the output idle voltage of this amp and is calibrated for ~11V if this is changed the 44.2K value resistor can be tweaked to readjust the bias to the recomended 2.5V. This is just how the circuit has been layed out but the bias for the reverb could be provided by another method making it independent of the output of this amp.

After this second amp are two bipolar transistor amps which are set up as source followers for buffering. This will have negligable affect on the signal color and are virtually distortion free.

For the reverb unit the signal level needs to be reduced so a resistive divider is used as part of the emitter resistor of the NPN buffer. As a part of the PNP buffer the emitter resistor also employs a divider which sets the bias for the unit and the low frequency input level while an RC arrangement sets the high pass corner frequency at ~2.36kHz. This combination causes the high pass filter to shelve at a pole frequency of ~280Hz.

The buffered output of the overdrive amp is summed into the master volume with a 68K resistor along with the reverb output using a 22K resisror. The 68K & 22K resistors sets the ratio of the maximum reverb mixing to the main signal. If the maximum reverb level needs to be increased or reduced adjusting the 68K value will do this. Increasing this too much will lower the main signal level into the last JFET amp to the point of not having enough output swing to drive the power amp. A value of 47K to 100K would be within an acceptable range. The master volume adjusted signal is fed into the final JFET amp for output into the power amp. Again the method for tweaking the idle output voltage and currents of the input amp applies here also.